job_022417b: Senior Hardware Engineer, Aeva (Palo Alto, CA)

From: Kristin Burns <kristin.burns_at_stanford.edu>
Date: Fri, 24 Feb 2017 06:21:50 -0800

Contact with your resume: <mailto:hello_at_aeva.ai>hello_at_aeva.ai

We are a rapidly growing startup founded by Stanford alums & backed
by industry leading VCs. We develop hardware & software technology
that enables robots to navigate seamlessly across diverse &
challenging environments.

We are looking for a Senior Hardware Engineer (EE) to lead the design
& development of complex electo-optical systems. You will work
closely with the founding team to release our first generation
product at an unmatched pace. You will have the opportunity to help
grow an early stage company where you are accountable for an end
product that will touch the lives of 10+ million users.

Your role:
    * Lead the design, development and testing of complex embedded
electro-optical systems from initial architecture thru to production.
    * Design, oversee development & validate a number of challenging
circuitry including low-noise & high speed baseband receivers,
mixed-signal boards with high speed DAC, ADC and FPGAs, low noise
current drivers, control loop circuits and power supplies.
    * Generate & maintain accurate design & validation documentation.

Your expertise:
    * 7+ years of board level experience including analog designs,
high speed mixed-signal design and SoC products.
    * Proficient with analog circuitry design such as high speed RF
(> 1GHz) ADC and DAC implementations, power supplies, low noise laser
drivers and low-noise layout techniques
    * Proficient with digital design including FPGA design
(synthesis, timing closure and implementation), JESD204B and SERDES
interfaces, GIGe and DSP implementations.
    * Experience with design capture tools (Orcad, PADS and Spice or
equivalent tools).
    * Significant experience working thru board design cycle:
schematics capture, BOM management, layout design, component
selections, board bring up & debug and supplier management
    * Experience with writing test software in C and/or assembly
language is a plus.
    * Experience with hardware descriptor languages such as Verilog
or VHDL is a plus.
    * Familiarity with telecom-grade lasers and detectors is a plus
    * Experience designing & shipping products in volume & driving
projects with CM/ODMs thru production.
    * Design for manufacturing experience is a plus.


Our offer:
    * Opportunity to work with a team that is passionate &
well-regarded in their fields
    * Competitive compensation and health benefits comparable to top
tech brands
    * Company stock
    * Flexible working hours and no vacation policy - we care about
delivering results, not punching timecards

Location: Palo Alto, CA
Contact us with your resume: <mailto:hello_at_aeva.ai>hello_at_aeva.ai




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Received on 2017-02-24 06:21:55

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